1. Field of the Invention
The present invention relates to a method of forming a semiconductor device with several gate levels.
The invention may be used in particular for forming charge transfer devices and in the following description this field will be preferably discussed. The invention may however be used for forming any semiconductor device comprising several gate levels, such for example as a photosensitive zone formed of MOS transistors.
It will be recalled that it is the general custom in this field to designate by the expression "several gate levels", gates which are coplanar but which have not been formed simultaneously. Thus, it is possible to treat differently the semiconductor substrate situated under these different gates. For example, in the case of charge transfer devices, for forming a device with two gate levels, in which the disymmetry in the channel potentials required for making the transfer unilateral is provided by ionic implantation, the substrate situated under the gates of the first level must be doped, then the gates of the first level must be formed, then the substrate situated under the gates of the second level must be doped and the gates of the second level must be formed.
2. Description of the Prior Art
In the prior art charge transfer devices are known having several gate levels with disymmetry by ionic implantation.
The disadvantage of current technologies is that they lead to devices in which there is relatively considerable overlapping of the gates of the upper technological level on those of the underlying level. Such overlapping introduces not inconsiderable capacitive coupling between gates, which disturbs the operation of the device.
In addition, this coupling may be different from one device to another which is troublesome in particular in devices with two phase structure in which two electrodes of two different levels are connected together. Since the parasite capacities are not identical, the different electrode pairs present different access times and may require clock signals adapted depending on the devices.
In addition such overlapping introduces a relief which is troublesome when maximum integration is sought.